Comparison ledger
Applied Materials 0010-16392 ESC Assembly, SPTS Rapier, side by side. Every value shown is drawn from the cited encyclopedia entries.
| Attribute | 0010-16392 ESC AssemblyApplied Materials | RapierSPTS |
|---|---|---|
| OEM | Applied Materials | SPTS |
| Category | Etch | Etch |
| Wafer size | — | Silicon and Silicon on Insulator (SOI) wafers |
| Process node | — | — |
| Introduced | — | — |
| Production run | — | — |
| Lifecycle | — | — |
| Lifecycle milestones | — | — |
| Control system | — | — |
| Generation | — | — |
| Family | Applied Materials 0010-16392 ESC Assembly | SPTS Rapier |
| Specifications | ||
| OEM | Applied Materials[1] | — |
| Model | 0010-16392[1] | — |
| Type | ESC Assembly[1] | Optimized Deep Reactive Ion Etching (DRIE) system[3] |
| Wafer Size | 300 mm[2] | — |
| Electrode Configuration | Dual[2] | — |
| Process type | — | Optimized Deep Reactive Ion Etching (DRIE) system[3] |
| Wafer materials | — | Silicon (Si) and Silicon on Insulator (SOI) wafers[3] |
| Loader capacity | — | Single vacuum cassette loader, 25 wafers capacity[3] |
| Transport robot | — | Brooks Magnatran 7 transport robot[3] |
| Plasma source | — | Dual high density Inductive Coupled Plasma (ICP) source[3] |
| Clamping | — | Electrostatic Clamping Chuck (ESC)[3] |
| Wafer biasing | — | Radio and low frequencies wafer biasing, with pulsing possibility[3] |
| Mass flow controllers | — | High speed digital mass flow controllers[3] |
| Endpoint systems | — | Amplified optical emission spectroscopy endpoint system; white light interferometry endpoint system[3] |
| Software | — | Powerful software with ramping curves of process parameters with time[3] |
| Module configuration | — | Unique, patented dual plasma source with multiple operating modes[3] |
| RF sources | — | Two RF independent sources, up to 3 kW each[3] |
| Gas showers | — | Two independent gas showers (center and edge zones)[3] |
| Temperature control | — | Ranges from -10°C to 30°C[3] |
| RF wafer biasing | — | Up to 2 kW with pulsing possibility and duty cycle control[3] |
| Low frequency wafer biasing | — | Up to 1.2 kW with pulsing possibility and duty cycle control[3] |
| Wafer-less conditioning | — | Chamber plasma conditioning or self-cleaning can run wafer-less if needed[3] |
| Available process gases | — | 2x SF6 720 sccm; 2x C4F8 500 sccm; O2 300 sccm and 1000 sccm; Ar 500 sccm; N2 100 sccm[3] |
| Standard process: DRIE Trench | — | Trench 2 µm: 300 nm/loop; trench >200 µm: 800 nm/loop[3] |
| Standard process: HAR Hole | — | 10 µm: 200 nm/loop; trench 2 µm: 165 nm/loop[3] |
| Standard process: DRIE-Nano Trench | — | 350 nm: 150 nm/loop; scallops <50 nm; depth limited to tens of µm[3] |
| Standard process: Opto | — | From 130 nm/min to 370 nm/min; continuous etch process; for shallow and accurate etch; less than 2 µm deep[3] |
| Standard process: Si_Release | — | ~3 µm/min lateral and ~6 µm/min vertical; continuous etch process; isotropic etching of silicon[3] |
| Standard process: Oxide_RIE | — | SiO2: 235 nm/min; Si3N4: 110 nm/min; PR etch rate 170 nm/min; thin layers only (<1 µm); O2 cleaning compulsory[3] |
| Standard process: BARC DUV42P | — | 78 nm/min; Si: 50 nm/min; anti-reflective coating opening after DUV litho[3] |
| Standard process: Wafer thinning | — | 4.4 µm/min; uniformity +/- 3.5%[3] |
| Standard process: Dicing | — | Design dicing streets only (150 µm): 3.4 µm/loop; not for structures <10 µm[3] |
| Wafer capacity (cassette loader) | — | 25 wafers[3] |
| Plasma source type | — | Dual high-density Inductively Coupled Plasma (ICP)[3] |
| Chuck type | — | Electrostatic Clamping Chuck (ESC)[3] |
| Wafer biasing frequencies | — | Radio frequency (up to 2kW) or low frequency (up to 1.2kW), both with pulsing[3] |
| RF source power | — | Up to 3 kW each (two sources)[3] |
| Temperature control range | — | -10°C to 30°C[3] |
| Process gases | — | SF6 (2x720sccm), C4F8 (2x500sccm), O2 (300sccm & 1000sccm), Ar (500sccm), N2 (100sccm)[3] |
| Etch type | — | Optimized Deep Reactive Ion Etching (DRIE)[3] |
| Target materials | — | Silicon (Si) and Silicon on Insulator (SOI) wafers[3] |
| Cassette loader capacity | — | 25 wafers[3] |
| Chuck | — | Electrostatic Clamping Chuck (ESC)[3] |
| Endpoint detection | — | Amplified optical emission spectroscopy endpoint system and white light interferometry endpoint system[3] |
| Module sources | — | Two RF independent sources up to 3 kW[3] |
| Clamp voltage | — | Variable clamp voltage[3] |
| Wafer Capacity | — | 25 wafers (single vacuum cassette loader)[3] |
| Source Type | — | Dual high density Inductive Coupled Plasma (ICP)[3] |
| RF Power per Source | — | Up to 3kW[3] |
| Wafer Biasing | — | RF up to 2kW or low frequency up to 1.2kW, with pulsing[3] |
| Temperature Range | — | -10°C to 30°C[3] |
| Process Gases | — | 2x SF6 (720sccm), 2x C4F8 (500sccm), O2 (300sccm & 1000sccm), Ar (500sccm), N2 (100sccm)[3] |
| Supported wafers | — | Silicon (Si) and Silicon on Insulator (SOI) wafers[3] |
| Dual plasma source | — | Unique, patented dual plasma source[3] |
| Target wafers | — | Silicon (Si) and Silicon on Insulator (SOI) wafers[3] |
| Cassette loader | — | Single vacuum cassette loader[3] |
| Cassette capacity | — | 25 wafers[3] |
| Module plasma sources | — | Two RF independent sources, up to 3 kW each[3] |
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