Comparison ledger
Tegal 6510, Tokyo Electron Unity Me, side by side. Every value shown is drawn from the cited encyclopedia entries.
| Attribute | 6510Tegal | Unity MeTokyo Electron |
|---|---|---|
| OEM | Tegal | Tokyo Electron |
| Category | Etch | Etch |
| Wafer size | 100mm | 100mm |
| Process node | down to 90nm | — |
| Introduced | — | — |
| Production run | — | — |
| Lifecycle | — | — |
| Lifecycle milestones | — | — |
| Control system | — | — |
| Generation | — | — |
| Family | Tegal 6510 | Tokyo Electron Unity Me |
| Specifications | ||
| Tool type | high-density CCP plasma etch tool[1] | Automatic plasma etching production tool[3] |
| RF power | dual-frequency RF power application[1] | — |
| Plasma confinement | magnetic plasma confinement[1] | — |
| Configuration | one or two HRē etch modules on a high-vacuum cluster platform[1] | — |
| Wafer size | 100mm – 200mm[1] | 100mm[3] |
| Optimization node | optimized for device design rules down to 90nm[1] | — |
| Process type | High-density CCP plasma etch[1] | — |
| RF configuration | Dual-frequency RF power application[1] | — |
| Magnetic confinement | Yes[1] | — |
| Modules | One or two HRe etch modules on a high-vacuum cluster platform[1] | — |
| Design rule | 90nm[1] | — |
| Equipment type | — | Automatic plasma etching production tool[3] |
| OEM | — | Tokyo Electron (TEL)[3] |
| Configured wafer size | — | 100mm[3] |
| Available cassette loader | — | C1 for 100mm wafers[3] |
| Process chamber | — | DRM (Dipole Ring Magnet) chamber[3] |
| DRM chamber type | — | RIE chamber with assistance of a magnetic field[3] |
| Optimized application | — | Etching dielectrics such as SiO2 and SixNy[3] |
| Chamber type | — | DRM (Dipole Ring Magnet) RIE chamber[3] |
| Process gases | — | C4F8 (30 sccm), CF4 (100 sccm), CHF3 (100 sccm), CH2F2 (100 sccm), O2 (30 sccm and 1000 sccm), N2 (100 sccm), Ar (1000 sccm)[3] |
| Process: CMI.BARC (BARC open) | — | Gap: 47 mm, SH temp: 40°C, Chemistry: CF4, Mask: JSR M108Y, JSR M35G, DUV42P; Etch rates: DUV42P 110 nm/min, M108Y/M35G 110 nm/min, SiO2 170 nm/min, Si 85 nm/min; Selectivity 1:1[3] |
| Process: CMI.OX.PR (SiO2 etch with PR mask) | — | Gap: 47 mm, SH temp: 40°C, Chemistry: C4F8 O2 Ar, Mask: PR; Etch rates: SiO2 440 nm/min @600W, 230 @500W, 200 @400W, 160 @300W, 125 @200W, 85 @100W; Selectivity >3:1[3] |
| Process: CMI.OX.ASI (SiO2 etch with aSi mask) | — | Gap: 47 mm, SH temp: 40°C, Chemistry: CH2F2 C4F8 O2 Ar, Mask: aSi; Etch rates: SiO2 450 nm/min, aSi 35 nm/min, JSR M108Y 130 nm/min; Selectivity 12:1[3] |
| Process: CMI.SIN.OX (Si3N4 etch) | — | Gap: 37 mm, SH temp: 40°C, Chemistry: CH2F2 O2 Ar, Mask: HSQ, PR; Etch rates: Si3N4 130 nm/min, Si 25 nm/min, HSQ 80 nm/min, PR 125 nm/min; Selectivity >1:1[3] |
| Chamber dedication | — | Dedicated to and optimized for etching dielectrics (e.g. SiO2 and SixNy)[3] |
| Available process gases | — | C4F8 [30 sccm], CF4 [100 sccm], CHF3 [100 sccm], CH2F2 [100 sccm], O2 [30 sccm & 1000 sccm], N2 [100 sccm], Ar [1000 sccm][3] |
| Cassette loader | — | C1 for 100mm wafers[3] |
| Transfer chamber | — | One transfer chamber (T/C)[3] |
| Unavailable modules at EPFL CMi | — | C2 cassette loader and P2 SCCM (Super Capacitively Coupled Module) process chamber are offline[3] |
| Metallic contamination restriction | — | The TEL etcher must NOT be exposed to any metallics or even traces of metallics; wafers once in contact with metallics must not be loaded[3] |
| Example process: CMI.BARC | — | Chemistry CF4; gap 47mm / SH temp 40°C; etch rate DUV42P 110 nm/min, M108Y/M35G 110 nm/min; selectivity SiO2: 170, Si: 85[3] |
| Example process: CMI.OX.PR | — | Chemistry C4F8 O2 Ar; gap 47mm / SH temp 40°C; SiO2 etch rates 440 nm/min @1100W, 230 nm/min @500W, 200 nm/min @400W, 160 nm/min @300W, 125 nm/min @200W, 85 nm/min; selectivity PR >3:1[3] |
| Example process: CMI.OX.ASI | — | Chemistry CH2F2 C4F8 O2 Ar; gap 47mm / SH temp 40°C; etch rates SiO2 450 nm/min, aSi 35 nm/min, JSR M108Y 130 nm/min; selectivity 12:1[3] |
| Example process: CMI.SIN.OX | — | Chemistry CH2F2 O2 Ar; gap 37mm / SH temp 40°C; etch rates Si3N4 130 nm/min, Si 25 nm/min, HSQ 80 nm/min, PR 125 nm/min; selectivity >1:1[3] |
| Process gases (DRM chamber) | — | C₄F₈ [30 sccm], CF₄ [100 sccm], CHF₃ [100 sccm], CH₂F₂ [100 sccm], O₂ [30 sccm & 1000 sccm], N₂ [100 sccm], Ar [1000 sccm][3] |
| Etch process - BARC open (CMI.BARC) | — | Chemistry: CF₄; Gap 47 mm, SH temp 40°C; Etch rate DUV42P: 110 nm/min, JSR M108Y, M35G: 110 nm/min; Selectivity: 1:1[3] |
| Etch process - SiO₂ with PR mask (CMI.OX.PR @1100W) | — | Chemistry: C₄F₈ O₂ Ar; Etch rate SiO₂: 440 nm/min @600W, 230 nm/min @500W, 200 nm/min @400W, 160 nm/min @300W, 125 nm/min @200W, 85 nm/min @?; Selectivity >3:1[3] |
| Etch process - SiO₂ with aSi mask (CMI.OX.ASI) | — | Chemistry: CH₂F₂ C₄F₈ O₂ Ar; Etch rate SiO₂: 450 nm/min, aSi: 35 nm/min, JSR M108Y: 130 nm/min; Selectivity 12:1[3] |
| Etch process - Si₃N₄ with HSQ mask (CMI.SIN.OX) | — | Chemistry: CH₂F₂ O₂ Ar; Etch rate Si₃N₄: 130 nm/min, Si: 25 nm/min, HSQ: 80 nm/min, PR: 125 nm/min; Selectivity >1:1[3] |
| Chamber clean process | — | Chemistry: O₂; Gap 27 mm, SH temp varies; Process name O2/CLN/XXC[3] |
| DRM chamber optimization | — | optimized for etching dielectrics such as SiO2 and SixNy[3] |
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